1. Documentation
  2. All
  3. Aironet Developer Platform
Aironet Developer Platform
  • Cisco Aironet Developer Platform Quick Start Guide
    • About Aironet Developer Platform
      • Development Process
      • About This Guide
    • Module Development Guidelines
      • Module Connectivity
      • Constraints
      • Design and Installation
    • HDK Block and Power Diagrams
      • Block Diagram
      • Power Diagram
    • HDK Elements
      • Specifications At-A-Glance
      • Ethernet
      • I2C/SMI Address Assignments
      • MAC Address Assignments
      • Serial IDPROM
      • Power and I/O Interfaces
        • Power and I/O Ports
        • Onboard Power Supplies
        • Power Input
        • Power Output
      • Signal Header and Control Pins
        • Ethernet Addresses and Signal Header Connections
        • Golden Finger Connector Pin Assignment
        • Headers and Control Pins
        • Power I/O Control
        • Sensor Control Pin
      • LED Indicators
    • HDK Mounting and Installation
    • Single Board Computer Support
    • WLC Configuration
    • Additional Resources
      • IVT & Compliance
    • Community and Support
      • Developer Support
      • FAQs

I2C and Ethernet Addressing

The HDK's ethernet ports are driven by a 4-port Marvell 88E6321 switch with its uplink tied to the host AP's SGMII bus. Only the 2 ethernet ports are connected.

Rev1 HDKs utilize the switch's Reduced Gigabit Media-Independent Interface (RGMII) port for legacy EM support.

The HDK's switch is unmanaged by default. Though the MDC/MDIO are connected, they are not currently supported by the Host AP software.

The MDC/MDIO interface is connected to the CPU side of the access point. This interface is intended for Cisco-internal use only. Third party module vendors shall not rely on this interface to manage their PHYs as there is no host software support for this bus. For third party-developed modules, MDC/MDIO lines must interface to the on-board CPU managing the PHY device.

Note: Rev2 HDKs delete the EM support; the RGMII is not accessible.

Ethernet MDC/MDIO Addresses

Part Address Applies to Note
Ethernet switch 00010 (0x2) AP3800 -
EM module 00001 (0x1) AP3800 (rev1 HDK only)

Note: Third party modules shall not rely on the host AP to manage module PHYs. PHYs, if used, must be managed by the module itself.

I2C Addresses

Part Address Applies to Note
U4 PSE controller 010 0001 (0x21)011 0001 (0x31) AP3800 0x21: MSCC External Automode (default)0x31: Semi/ Auto mode
U10 IDPROM 101 0000 (0x50) AP3800 -
U11 ACT2 111 0000 (0x70) AP3800 Reserved, not fitted
U13 ALS 100 0100 (0x44) AP3800/Module -
U14 Temp/Hum 100 0000 (0x40) AP3800/Module -
J7 External sensor TBD AP3800/Module -
Next